The present invention relates to semiconductor devices including an electronic component of surface mount type and a substrate with the electronic component mounted thereon. In particular, the present invention relates to semiconductor devices in which an external electrode of the electronic component contains a palladium film and is joined to a tin (Sn)-zinc (Zn)-based lead-free solder material.
A semiconductor device formed of an electronic component surface-mounted on a substrate will be described below with reference to the accompanying drawings.
FIGS. 6A to 6C illustrate a conventional semiconductor device. FIG. 6A shows a cross-sectional construction of the semiconductor device, FIG. 6B shows the underside construction of an electronic component, and FIG. 6C shows the plane construction of a substrate.
Referring to FIG. 6A, an electronic component 51 of surface mount type is mounted on the main surface of a substrate 53. On the surface of the electronic component 51 facing the substrate 53, electrode terminals 52 are formed. On the main surface of the substrate 53, interconnect electrodes 54 are formed at positions facing the electrode terminals 52 of the electronic component 51. The electrode terminals 52 adhere securely to the respective interconnect electrodes 54 with a solder material 55 so that they are electrically connected to each other.
As mentioned above, to mount the electronic component 51 of surface mount type on the substrate 53, this approach has been employed in which the interconnect electrodes 54 formed on the main surface of the substrate 53 and the electrode terminals 52 provided on the electronic component 51 are joined with a solder.
There are various plane shapes of the electrode terminals 52 depending upon the type of the electronic component 51. According to each plane shape of the electrode terminals 52, the plane shape and the plane dimension of the interconnect electrodes 54 on the substrate 53 are determined.
Taking an area array package for example, as shown in FIG. 6B, the electronic component 51 has the multiple electrode terminals 52 of rectangular plane shapes provided on the undersurface thereof. The interconnect electrodes 54 of the substrate 53, which will be joined to the electrode terminals 52 by the solder material 55, are provided in almost the same shapes as the electrode terminals 52, as shown in FIG. 6C. Therefore, in the step of mounting the electronic component 51 on the substrate 53, the solder material 55 are first placed, by printing technique or the like, on the interconnect electrodes 54 of the substrate 53 in almost the same shapes as the interconnect electrodes 54, after which a solder reflow process is performed to join the electrode terminals 52 to the interconnect electrodes 54.
Note that the interconnect electrodes 54 provided on the substrate 53 are generally formed by plating treatment or flux coating in which a copper foil is coated with nickel (Ni) and gold (Au).
As the conventional solder material 55, general use is made of a solder material of Sn—Pb eutectic crystal type. It exhibits a sufficient solder wettability even if palladium plating is applied as a surface treatment for the electrode terminals 52 provided on the electronic component 51, so that it provides good solder joint strength.
The dominating lead-free solder material containing no lead has been a tin (Sn)-silver (Ag)-based lead-free solder material, which disadvantageously has a high melting temperature and high material costs. To overcome this disadvantage, a tin (Sn)-zinc (Zn)-based lead-free solder material has recently been employed which has a low melting temperature and low material costs.
As shown in FIG. 6A, if palladium-based plating as a surface treatment for the electrode terminals 52 is applied to the electronic component 51 and the Sn—Zn-based lead-free solder material is used as the solder material 55, the Sn—Zn-based lead-free solder material has much a worse solder wettability than a conventional solder material of Sn—Pb eutectic crystal type. Moreover, the inventors have confirmed that the Sn—Zn-based lead-free solder material melted by heat does not sufficiently wet out the palladium-based plating, especially, because of its strong cohesive force.
For example, in the electronic component 51 of QFN (quad flat non-leaded package) type as shown in FIG. 6B, if the electrode terminals 52 thereof are of rectangular plane shapes and palladium-based plating is applied as the surface treatment for the electrode terminals 52, the Sn—Zn-based lead-free solder material has a good solder wettability for the interconnect electrodes 54 of the substrate 53. However, it has a poor solder wettability and exhibits a large cohesive property for the electrode terminals 52 provided on the electronic component 51, so that solder joint is formed only at a portion of each electrode terminal 52. Accordingly, good solder joint and high solder strength cannot be provided therebetween.
As described above, in the case where the solder material 55 does not wet out the electrode terminals 52, the electrode terminals 52 make insufficient electrical and mechanical connection with the interconnect electrodes 54 of the substrate 53, resulting in a decrease in the reliability of the semiconductor device.